1. Field of the Invention
The present invention relates to a semiconductor device comprising first and second semiconductor chips which are contained in a single package and at least one of which is formed by using a wide gap semiconductor (such as silicon carbide or gallium nitride) as the base material. The following description of the present invention centers mainly on semiconductor devices for use in high voltage applications; however, the present invention is not limited to such power semiconductor devices but could be used with any kind of semiconductor devices.
2. Description of the Background Art
In applications to voltage-source inverters, in general, a switching chip having switching capability and a circulating diode chip are connected in inverse-parallel with each other.
FIG. 9 is a longitudinal cross-sectional view illustrating the configuration of a conventional module element 400 for use in voltage-source inverters. Active elements of the module element 400 each are formed by using silicon as the base material. That is, a switching chip 401 and a diode chip 402 contained in a closed container 417 are both made of silicon. The switching chip 401 has a cathode electrode 403 and a control electrode 404 formed on the front surface and an anode electrode 405 formed on the rear surface. The diode chip 402 has an anode electrode 406 formed on the front surface and a cathode electrode 407 formed on the rear surface. The anode electrode 405 of the switching chip 401 and the cathode electrode 407 of the diode chip 402 are electrically connected to each other by being soldered to a conductive plate 408 by a solder layer 409. The cathode electrode 403 and the control electrode 404 of the switching chip 401 are connected respectively to a cathode conducting bar 410 and a control conducting bar 411 by a bonding wire 413, and the anode electrode 406 of the diode 402 is connected by the bonding wire 413 to the cathode conducting bar 410. The conductive plate 408 is connected through an insulating substrate 414 to a heat sink 415 having cooling capability. Also, the conductive plate 408 is electrically connected through a metal body 416 to an anode conducting bar 412.
In this configuration, heat generated by the energy losses of the chips 401 and 402 can be dissipated from their respective rear electrodes 405 and 407 to the outside through the path formed of the solder layer 409, the conductive plate 408, the insulating substrate 414 and the heat sink 415.
However, in the configuration of the conventional module element 400 illustrated in FIG. 9, since the switching chip 401 and the diode chip 402 are both electrically and mechanically connected to the conductive plate 408, even the use of the low-loss wide gap semiconductor for production of the switching chip 401 and/or the diode chip 402 can achieve neither simplification of an element cooling mechanism nor significant reductions in the size and weight of the closed container 417 or the module element 400 itself. Accordingly, even if the chips in the module element with the configuration of FIG. 9 are replaced by wide gap semiconductor chips, reductions in the cost of the semiconductor device cannot be achieved.
The present invention has been made to solve the aforementioned conventional problems and an object thereof is to achieve significant simplification of an element cooling mechanism by providing a way to locate a semiconductor chip in a position where in the conventional module element having active elements formed of only semiconductor chips using silicon as the base material, the chips cannot be placed for reasons of the design of heat dissipation. Another object of the present invention is to achieve reductions in the size, weight and cost of a module element having a wide gap semiconductor chip.
According to an aspect of the present invention, the semiconductor device includes a heat sink, an insulating substrate, a conductive plate, a first semiconductor chip, a second semiconductor chip and a container. The heat sink has a bottom surface exposed to the outside and an upper surface opposed to the bottom surface. The insulating substrate is jointed to the upper surface of the heat sink, and the conductive plate is jointed to an upper surface of the insulating substrate. The first semiconductor chip has a first main electrode electrically connected through a first conductive layer to an upper surface of the conductive plate, and a second main electrode opposed to and having a smaller area than the first main electrode. The second semiconductor chip has a first main electrode electrically connected through a second conductive layer to and having a smaller area than the second main electrode of the first semiconductor chip, and a second main electrode opposed to the first main electrode. The container encloses the heat sink except an exposed portion of the bottom surface, the insulating substrate, the conductive plate, the first semiconductor chip and the second semiconductor chip in its interior space. A portion above the second main electrode of the second semiconductor chip is the interior space of the container, and a base material of the second semiconductor chip is a wide gap semiconductor having a greater interband energy gap than silicon.
The second semiconductor chip can, without decline of its capabilities, be placed in a position farther from an element cooling mechanism formed of the heat sink, the insulating substrate and the conductive plate (i.e., in a position where a silicon semiconductor chip cannot be placed for reasons of the design of heat dissipation), as compared with the first semiconductor chip. Further, the second semiconductor chip can be cooled indirectly through the first semiconductor chip. This achieves simplification of the element cooling mechanism. With the simplified element cooling mechanism, the aspect of the present invention can achieve reductions in the size, weight and cost of the semiconductor device. Besides, the aspect of the present invention can reduce the size of the second semiconductor chip by using a wide gap semiconductor chip as the second semiconductor chip, thereby further reducing the size of the semiconductor device.
According to another aspect of the present invention, the semiconductor device includes a heat sink, an insulating substrate, a conductive plate, a first semiconductor chip, a metal base, a second semiconductor chip and a container. The heat sink has a bottom surface exposed to the outside and an upper surface opposed to the bottom surface. The insulating substrate is jointed to the upper surface of the heat sink, and the conductive plate is jointed to an upper surface of the insulating substrate. The first semiconductor chip has a first main electrode electrically connected through a first conductive layer to a first surface portion of an upper surface of the conductive plate, and a second main electrode opposed to the first main electrode with respect to a first direction which is equivalent to a direction of a normal to the upper surface of the conductive plate. The metal base includes a first portion and a second portion. The first portion has a first end which is electrically connected through a second conductive layer to a second surface portion of the upper surface of the conductive plate adjacent to the first surface portion, and extending from the first end to a second end in the first direction, and the second portion is coupled to the second end of the first portion and extends in a second direction orthogonal to the first direction so as to form an L-shape with the first portion. The second semiconductor chip has a first main electrode electrically connected through a third conductive layer to an upper surface of the second portion of the metal base, and a second main electrode opposed to the first main electrode with respect to the first direction. The container encloses the heat sink except an exposed portion of the bottom surface, the insulating substrate, the conductive plate, the first semiconductor chip, the metal base and the second semiconductor chip in its interior space. A lower surface of the second portion of the metal base is above the level of an upper surface of the second main electrode of the first semiconductor chip, and a base material of the second semiconductor chip is a wide gap semiconductor having a greater interband energy gap than silicon.
By the use of the metal base, the second semiconductor chip can, without decline of its capabilities, be placed in an upper position where a silicon semiconductor chip cannot be placed for reasons of the design of heat dissipation. Also, through the metal base, the second semiconductor chip can be cooled indirectly by an element cooling mechanism formed of the heat sink, the insulating substrate and the conductive plate. This achieves simplification of the element cooling mechanism. With the simplified element cooling mechanism, the aspect of the present invention can achieve reductions in the size, weight and cost of the semiconductor device. Besides, the aspect of the present invention can reduce the size of the second semiconductor chip by using a wide gap semiconductor chip as the second semiconductor chip, thereby further reducing the size of the semiconductor device. Further, since the second semiconductor chip is located above the first semiconductor chip, the aspect of the present invention has the effect of not limiting the size of the second semiconductor chip by that of the first semiconductor chip.
According to still another aspect of the present invention, the semiconductor device includes a first conductive base, a first metal base, a first semiconductor chip, a second metal base, a second semiconductor chip, a third metal base, an insulating substrate, a second conductive base, a first interconnection, a second interconnection and a container. The first conductive base has a bottom surface exposed to the outside and an upper surface opposed to the bottom surface. The first metal base has a lower surface on the upper surface of the first conductive base and an upper surface opposed to the lower surface. The first semiconductor chip has a first main electrode located on the upper surface of the first metal base and a second main electrode opposed to the first main electrode. The second metal base has a lower surface on the second main electrode of the first semiconductor chip and an upper surface opposed to the lower surface. The second semiconductor chip has a first main electrode located on the upper surface of the second metal base and a second main electrode opposed to the first main electrode. The third metal base has a lower surface on the second main electrode of the second semiconductor chip and an upper surface opposed to the lower surface. The insulating substrate has a lower surface on the upper surface of the third metal base and an upper surface opposed to the lower surface. The second conductive base has a lower surface on the upper surface of the insulating substrate and an upper surface opposed to the lower surface and exposed to the outside. The first interconnection electrically connects the first metal base and the third metal base, and the second interconnection electrically connects the second metal base and the second conductive base. The container encloses the first conductive base except an exposed portion of the bottom surface, the first metal base, the first semiconductor chip, the second metal base, the second semiconductor chip, the third metal base, the insulating substrate, the second conductive base except an exposed portion of the upper surface, the first interconnection and the second interconnection in its interior space. The bottom and upper surfaces of the first conductive base have larger areas than the first and second main electrodes of the first semiconductor chip, and the lower and upper surfaces of the second conductive base have larger areas than the first and second main electrodes of the second semiconductor chip. A base material of at least one of the first and second semiconductor chips is a wide gap semiconductor having a greater interband energy gap than silicon.
The first and second semiconductor chips are located face to face with the second metal base sandwiched in between and are also sandwiched between the first and second conductive bases with the first and third metal bases and the insulating substrate therebetween. This achieves simplification of the element cooling mechanism and reductions in the size, weight and cost of the semiconductor device itself. Besides, by the provision of the second metal base, the aspect of the present invention can achieve the effect of increasing heat capacity of the whole device. Also, the provision of the interconnection between the second metal base and the second conductive base establishes electrical continuity between the second conductive base, the upper surface of which is exposed to the outside, and both the second main electrode of the first semiconductor chip and the first main electrode of the second semiconductor chip. Further, according to the aspect of the present invention, the path of heat dissipation is secured for the individual first and second semiconductor chips, which brings about the effect of increasing the efficiency of heat dissipation. Furthermore, the use of a wide gap semiconductor chip as at least one of the semiconductor chips achieves the effect of reducing the size of that semiconductor chip, thereby contributing to reductions in the size of the semiconductor device.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.